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Synthesis Control of Switching Topologies of Converters full report
#1


.doc   Synthesis Control of Switching Topologies of Converters.doc (Size: 149 KB / Downloads: 72)

Synthesis Control of Switching Topologies of Converters

ABSTRACT
An intelligent inference pipeline for the control of a dc-dc buck-boost converter was designed and built using a semi-custom. The switching topologies of the converter was mapped into a look-up table that was synthesized into controllers, and detectors for building complete instrument systems.
Two different topologies are called buck“boost converter. Both of them can produce an output voltage much larger (in absolute magnitude) than the input voltage. Both of them can produce a wide range of output voltage from that maximum output voltage to almost zero.
The inverting topology “ The output voltage is of the opposite polarity as the input
A buck (step-down) converter followed by a boost (step-up) converter “ The output voltage is of the same polarity as the input, and can be lower or higher than the input. Such a non-inverting buck-boost converter may use a single inductor that is used as both the buck inductor and the boost inductor.
The buck“boost converter is a type of DC-DC converter that has an output voltage magnitude that is either greater than or less than the input voltage magnitude. It is a switch mode power supply with a similar circuit topology to the boost converter and the buck converter. The output voltage is adjustable based on the duty cycle of the switching transistor. One possible drawback of this converter is that the switch does not have a terminal at ground; this complicates the driving circuitry. Also, the polarity of the output voltage is opposite the input voltage. Neither drawback is of any consequence if the power supply is isolated from the load circuit (if, for example, the supply is a battery) as the supply and diode polarity can simply be reversed. The switch can be on either the ground side or the supply side.
Converters
There are two types of converters they are described as follows,
A buck converter is a step-down DC to DC converter. Its design is similar to the step-up boost converter, and like the boost converter it is a switched-mode power supply that uses two switches (a transistor and a diode), an inductor and a capacitor.
The simplest way to reduce a DC voltage is to use a voltage divider circuit, but voltage dividers waste energy, since they operate by bleeding off excess power as heat; also, output voltage isn't regulated (varies with input voltage). Buck converters, on the other hand, can be remarkably efficient (easily up to 95% for integrated circuits) and self-regulating, making them useful for tasks such as converting the 12 - 24 V typical battery voltage in a laptop down to the few volts needed by the processor.
Theory of Operation
When the switch pictured above is closed (On-state, top of figure 2), the voltage across the inductor is VL = Vi - Vo. The current through the inductor rises linearly. As the diode is reverse-biased by the voltage source V, no current flows through it;
When the switch is opened (off state, bottom of figure 2), the diode is forward biased. The voltage across the inductor is VL = - Vo (neglecting diode drop). The current IL decreases.
The operation of the buck converter is fairly simple, with an inductor and two switches (usually a transistor and a diode) that control the inductor. It alternates between connecting the inductor to source voltage to store energy in the inductor and discharging the inductor into the load.
Continuous mode
A buck converter operates in continuous mode if the current through the inductor (IL) never falls to zero during the commutation cycle. In this mode, the operating principle is described by the chronogram
Discontinuous mode
In some cases, the amount of energy required by the load is small enough to be transferred in a time lower than the whole commutation period. In this case, the current through the inductor falls to zero during part of the period. The only difference in the principle described above is that the inductor is completely discharged at the end of the commutation cycle.
Evolution of the voltages and currents with time in an ideal buck converter operating in discontinuous mode.
We still consider that the converter operates in steady state. Therefore, the energy in the inductor is the same at the beginning and at the end of the cycle (in the case of discontinuous mode, it is zero). This means that the average value of the inductor voltage (VL) is zero, i.e that the area of the yellow and orange rectangles in figure 5 are the same. This yields:
So the value of d is:
Discontinuous mode
As told at the beginning of this section, the converter operates in discontinuous mode when low current is drawn by the load, and in continuous mode at higher load current levels. The limit between discontinuous and continuous modes is reached when the inductor current falls to zero exactly at the end of the commutation cycle.
Efficiency factors
Conduction losses that depend on load:
Resistance when the transistor or MOSFET switch is conducting.
Diode forward voltage drop (usually 0.7 V or 0.4 V for schottky diode)
Inductor winding resistance
Capacitor equivalent series resistance
Switching losses:
Voltage-Ampere overlap loss
Frequencyswitch*CV2 loss
Reverse latence loss
Losses due driving MOSFET gate and controller consumption. Transistor leakage current losses, and controller standby consumption.[4]
REFERENCES
1. ^ Guy Séguier, Électronique de puissance, 7th edition, Dunod, Paris
2. ^ Tom's Hardware: "Idle/Peak Power Consumption Analysis"
3. P. Julián, A. Oliva, P. Mandolesi, and H. Chiacchiarini, Output discrete feedback control of a DC-DC Buck converter, in Proceedings of the IEEE International Symposium on Industrial Electronics (ISIE™97),
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#2
An intelligent fuzzy logic inference pipeline was designed and built to control a buck-boost DC-DC converter with a semi-custom VLSI chip. The diffuse linguistics describing the switching topologies of the converter was mapped in a query table that was synthesized in a set of Boolean equations. A VLSI chip - a field programmable gate array (FPGA) - was used to implement the Boolean equations. The features include the size of the RAM chip independent of the number of rules in the knowledge base, fuzzification and defuzzification on the chip, faster response with speeds on fuzzy logic inferences per second (FLIPS) and a low cost VLSI chip.
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